In a fabrication process of a semiconductor device, a photolithography process is used to form a fine resist pattern. In the photolithography process, the surface of a semiconductor substrate (hereinafter, referred to as a substrate, or a wafer) is subjected to a hydrophobizing process, and a bottom anti-reflective coating (BARC) is coated thereto, followed by a heating. And then, the substrate is coated with a resist and exposed through a thermal process, and the solubilized portion is removed through a developing process thereby forming the fine resist pattern.
As a semiconductor device is miniaturized, it has been difficult to sufficiently secure a fine-pattern exposure contrast with a line-width and space-width ratio of 1:1 by using only an optical exposure technology. Accordingly, there has been provided a method for forming a fine resist pattern, in which a resist pattern is formed on a substrate through a series of photolithography processes (including resist coating, thermal process, exposure, developing process), and slimming of the line width of the formed resist pattern (hereinafter, referred to as a slimming process) is carried out.
Herein, in the fine resist pattern forming method, including the slimming process, for example, as a first process of the first-half, several processes (such as a step of coating BARC on the wafer, a step of coating a resist on the BARC-coated wafer, a step of exposing a selected portion of the resist-coated wafer, and a first developing step of forming a resist pattern by supplying a developer to the exposed wafer and carrying out developing process) may be carried out.
Also, for example, as a second process of the latter-half, a second developing step of removing a middle exposed area from the developed resist pattern, a step of coating a reactive material for solubilizing the resist pattern, and a third developing step for carrying out the developing process of the wafer having the solubilized resist pattern through the supply of a developer may be carried out.
There is a coating and developing apparatus for forming such a fine resist pattern by performing a liquid process, including coating and developing processes, in which a plurality of wafers stored in a cassette (or a FOUP) are set in a cassette placing unit of a carrier block, while various processing units are disposed at both sides from the cassette side toward an exposure device side. See, for example, Japanese Patent Laid-open Publication No. 2003-7795.